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Invia is a semiconductor design house focused on embedded security. We deliver analog, digital and software IPs intended to secure ICs. Invia s customers are the global leaders in digital security.

Invia was founded in 2006 by a team of smart card experts. Invia s key members have more than 15 years of experience in the design and test of contact and contactless flash-based smart card products. Before joining Invia, they held various positions in smart card divisions of leading multinationals. Based in the South of France, Invia s R&D team comprises 60 security experts, including 15 PhDs.

Invia s portfolio includes mixed-signal building blocks and cryptographic libraries specifically designed to protect SoCs against security threats - eavesdropping, tampering, counterfeiting, cloning and reverse-engineering - while minimizing the area and power overhead.

Invia s customers are system integrators addressing markets where security is a key requirement: military components, EMV payment cards, conditional access (pay-TV), ID, SIM cards, secure terminals and automotive.

Invia reduces the time-to-market and the integration risks by taking into account its customer s design flow at the earlier design stage. Invia provides comprehensive documentations and quality support for most EDA tools. Invia s product engineering team has proven track records down to the 28 nm node.

Because security shall be addressed at each project stage, Invia s expertise ranges from specification to certification through implementation and qualification.

   
5 Solutions

1
Cryptographic library for Elliptic Curve Diffie-Hellman (ECDH) and Elliptic Curve Digital Signature Algorithm (ECDSA)
The Software ECC is a cryptographic library providing the main ECDSA and ECDH functionalities

2
Physical Unclonable Function (PUF)
The Physical Unclonable Function (PUF) is a fully integrated analog IP generating a stable number from random local process variations.

3
Secure 128-bit Advanced Encryption Standard (AES) coprocessor
The Secure AES Coprocessor encrypts and decrypts 128-bit data blocks by computing an AES algorithm with a 128, 192 or 256-bit key through a highly secure architecture (SPA, DPA[1] and fault hardened).

4
Secure 32-bit RISC Processor - Secure 32-bit RISC processor for embedded applications
A secure processor based on a 32-bit RISC architecture specifically optimized for embedded applications. Its low gate count structure operates from a compact code size while achieving high performances on Linux VM, Java VM or OpenSSL library.

5
Secure 32-bit RISC Processor - Secure 32-bit RISC processor for embedded applications
A secure processor based on a 32-bit RISC architecture specifically optimized for embedded applications. Its low gate count structure operates from a compact code size while achieving high performances on Linux VM, Java VM or OpenSSL library.

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