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Silicon Valley Company Mirabilis Design unveils the first automotive architecture exploration platform with Time-Sensitive Networking (IEEE802.1Q) protocol

Sunnyvale, CA., Jan. 09, 2019 – 

Mirabilis Design announced the immediate availability of Time-Sensitive Networking (IEEE802.1Q) protocol in the VisualSim AI-based Automotive Architecture Exploration Platform, an unique library of network protocols, electronics, software components and a high-performance modeling and simulation platform. Using this exploration platform, Architects of automotive networks, Electronic Control Unit and automotive parts makers (hardware and software) can construct virtual rapid prototypes of their proposed solution, simulate with use cases and workloads, apply failure cases and evaluate the generated reports. Design teams have seen a 30% increased productivity and a fully validated design that eliminates surprises during integration.

"Automotive architects require multiple analytical tools for architecture exploration of their automotive system" said Deepak Shankar, Founder, Mirabilis Design. "VisualSim provides a single platform to explore all aspects of the automotive architecture at an extremely high-level of accuracy, with validated libraries that are user-customizable. This methodology accelerates model construction for those designing new automotive parts and those enhancing standards".

The VisualSim Time Sensitive Networking supports the following protocols:

  1. TSN supports IEEE802.1Qbv- Time Aware Shaping
  2. TSN supports IEEE8201.Qbu and IEEE 802.3br- Preemption
  3. TSN supports IEEE 802.1Qca- Path Control and Reservation
  4. TSN supports IEEE 802.1Qcc- Stream Reservation protocol
  5. TSN supports IEEE 802.1Qci- Per stream filtering and policing
  6. TSN supports IEEE 802.1QCB- frame replication and elimination
  7. TSN supports IEEE 802.1Qch- Cyclic frequency and forwarding
  8. TSN supports IEEE 802.1AS- Enhanced generic Precision Time Protocol

The library is provided with complete source code and enables the user to either construct networks or enhance the protocol for next-generation standards. The library contains the router, bridges, network links, interface to wireless and CAN, ECU link, routing algorithms, schedulers, traffic shapers and time synchronization. The statistics generated include packet latency for CDT, AVB and BE frames, link throughput, buffer occupancy, activity trace, monitoring for send slope and idle slope, and quality of service.

VisualSim Automotive is equipped with modeling components, analysis tools and simulation profiles. User can simulate the system specification for traffic and user cases to get an accurate measurement of the performance, deadlines, power consumption and failure analysis. The current VisualSim Automotive library contains CAN, CAN-FD, Time-Triggered-Ethernet, FlexRay, software profiler, processors, RTOS, FPGA and other hardware components. The addition of this Time Sensitive Network protocols completes the full package and can be immediately used by automotive designers.

This VisualSim library can be used by:

VisualSim TSN Library is available as an add-on to VisualSim Architect 19.1, the modeling and simulation platform from the Mirabilis Design. This product is used extensively in designing products from automotive networks and safety critical systems to processors and System-on-Chip. VisualSim Architect 19.1 and its add-on - VisualSim Automotive Library is available on Windows, Linux, and MAC OS.

About Mirabilis Design

Mirabilis Design, a Silicon Valley company, designs cutting edge software solutions that identify and eliminate risks in product performance. Its flagship product, VisualSim Architect is a system-level modeling, simulation, and analysis environment that relies on libraries and application templates to vastly improve model construction and time required for analysis. The seamless design framework facilitates designers to work on a design together, cohesively, to meet an intermeshed time and power requirements. It is typically used for maximum results, early in the design stage, parallel to the development of the product’s written specification. It precedes implementation stages - RTL, software code, or schematic – rendering greater design flexibility.








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